Review on Design and Implementation of DSSS-CDMA Transmitter using HDL with Raised Cosine Filter to Minimize ISI

Spread spectrum technology has blossomed from a military technology into one of the fundamental building blocks in current and next-generation wireless systems. The spread-spectrum technology provides antijam capabilities through a processing gain that results from using a wideband (large bandwidth) signal and it also provides capacity enhancement and robustness against noise. This paper presents the design and implementation of a direct sequence spread spectrum (DSSS-CDMA) system using HDL. The transmitter module mainly consist of symbol generator, PN sequence generator, spreader and BPSK modulator, IF carrier generator ,Root cosine filter(RCF) and DAC (Digital to Analog Convertor) blocks. The Xilinx Synthesis Technology (XST) of Xilinx ISE (Integrated Software Environment) 14.7 version tool will be used for synthesis of transmitter on FPGA(Field Programmable Gate Array) and also MATLAB( R2012b) software will be used for simulation purpose. To minimize the inter-symbol interference (ISI) at transmitter side the Raised cosine filtering will be performed. Keywords— DSSS-CDMA, VHDL, BPSK, Spread Spectrum, ISI, FPGA, RCF, DAC